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www.irf.com 1 10/08/09 IRFI4019HG-117P notes through are on page 2
to-220 full-pak 5 pin features integrated half-bridge package reduces the part count by half facilitates better pcb layout key parameters optimized for class-daudio amplifier applications low r ds(on) for improved efficiency low qg and qsw for better thd andimproved efficiency low qrr for better thd and lower emi can delivery up to 200w per channel into8 ? load in half-bridge configuration amplifier lead-free package halogen-free description this digital audio mosfet half-bridge is specifically designed for class d audio amplifier applications. itconsists of two power mosfet switches connected in half-bridge configuration. the latest process is used to achieve low on-resistance per silicon area. furthermore, gate charge, body-diode reverse recovery, and internal gate resistance are optimized to improve key class d audio amplifier performance factors such as efficiency, thd and emi. these combine to make this half-bridge a highly efficient, robust and reliable device for class d audio amplifier applications. g1, g2 d1, d2 s1, s2 gate drain source absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t c = 25c continuous drain current, v gs @ 10v a i d @ t c = 100c continuous drain current, v gs @ 10v i dm pulsed drain current e as single pulse avalanche energy mj p d @t c = 25c power dissipation w p d @t c = 100c power dissipation linear derating factor w/c t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r jc junction-to-case CCC 6.9 r ja junction-to-ambient CCC 65 77 18 7.2 0.15 10lb in (1.1n m) -55 to + 150 300 max. 6.2 34 20 150 8.7 v ds 150 v r ds(on) typ. @ 10v 80 m q g typ. 13 nc q sw typ. 4.1 nc r g(int) typ. 2.5 ? t j max 150 c key parameters downloaded from: http:///

2 www.irf.com s d g repetitive rating; pulse width limited by max. junction temperature. starting t j = 25c, l = 5.8mh, r g = 25 ? , i as = 5.2a. pulse width 400s; duty cycle 2%. r is measured at t j of approximately 90c. limited by tjmax. see figs. 14, 15, 17a, 17b for repetitive avalanche information specifications refer to single mosfet. electrical characteristics @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 150 CCC CCC v ? v dss / ? t j breakdown voltage temp. coefficient CCC 0.19 CCC v/c r ds(on) static drain-to-source on-resistance CCC 80 95 m ? v gs(th) gate threshold voltage 3.0 CCC 4.9 v ? v gs(th) / ? t j gate threshold voltage coefficient CCC -11 CCC mv/c i dss drain-to-source leakage current CCC CCC 20 a CCC CCC 250 i gss gate-to-source forward leakage CCC CCC 100 na gate-to-source reverse leakage CCC CCC -100 g fs forward transconductance 11 CCC CCC s q g total gate charge CCC 13 20 q gs1 pre-vth gate-to-source charge CCC 3.3 CCC q gs2 post-vth gate-to-source charge CCC 0.8 CCC nc q gd gate-to-drain charge CCC 3.9 CCC q godr gate charge overdrive CCC 5.0 CCC see fig. 6 and 19 q sw switch charge (q gs2 + q gd ) CCC 4.1 CCC r g(int) internal gate resistance CCC 2.5 CCC ? t d(on) turn-on delay time CCC 7.0 CCC t r rise time CCC 6.6 CCC t d(off) turn-off delay time CCC 13 CCC ns t f fall time CCC 3.1 CCC c iss input capacitance CCC 810 CCC c oss output capacitance CCC 100 CCC pf c rss reverse transfer capacitance CCC 15 CCC c oss effective output capacitance CCC 97 CCC l d internal drain inductance CCC 4.5 CCC between lead, nh 6mm (0.25in.) l s internal source inductance CCC 7.5 CCC from package diode characteristics parameter min. typ. max. units i s @ t c = 25c continuous source current CCC CCC 8.7 (body diode) a i sm pulsed source current CCC CCC 34 (body diode) v sd diode forward voltage CCC CCC 1.3 v t rr reverse recovery time CCC 57 86 ns q rr reverse recovery charge CCC 140 210 nc i d = 5.2a ? = 1.0mhz, see fig.5 t j = 25c, i f = 5.2a di/dt = 100a/s t j = 25c, i s = 5.2a, v gs = 0v showing the integral reverse p-n junction diode. conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 5.2a v ds = v gs , i d = 50a v ds = 150v, v gs = 0v v gs = 0v, v ds = 0v to 120v v ds = 150v, v gs = 0v, t j = 125c v gs = 20v v gs = -20v v gs = 10v i d = 5.2a v gs = 0v mosfet symbol r g = 2.4 ? v ds = 50v, i d = 5.2a conditions and center of die contact v dd = 75v, v gs = 10v v ds = 75v v ds = 25v downloaded from: http:///

www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 6. typical gate charge vs.gate-to-source voltage fig 5. typical capacitance vs.drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 25c 5.5v vgs top 15v 12v 10v 9.0v 8.0v 7.0v 6.0v bottom 5.5v 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 5 10 15 20 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 120v vds= 75v vds= 30v i d = 5.2a 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 150c 5.5v vgs top 15v 12v 10v 9.0v 8.0v 7.0v 6.0v bottom 5.5v -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.0 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 5.2a v gs = 10v 4 5 6 7 8 v gs , gate-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) v ds = 50v 60s pulse width t j = 25c t j = 175c downloaded from: http:///

4 www.irf.com fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 7. typical source-drain diode forward voltage fig 8. maximum safe operating area fig 10. threshold voltage vs. temperature 25 50 75 100 125 150 t j , junction temperature (c) 0 2 4 6 8 10 i d , d r a i n c u r r e n t ( a ) 0.0 0.5 1.0 1.5 v sd , source-to-drain voltage (v) 0.1 1 10 100 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 150c v gs = 0v -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 2.0 3.0 4.0 5.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 50a 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) ? (sec) 1.508254 0.000814 2.154008 0.111589 3.237738 2.2891 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 c ci= i / ri ci= i / ri 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 150c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec dc downloaded from: http:///

www.irf.com 5 fig 13. maximum avalanche energy vs. drain current fig 12. on-resistance vs. gate voltage 4 5 6 7 8 9 10 v gs , gate-to-source voltage (v) 0.0 0.1 0.2 0.3 0.4 0.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( ? ) t j = 25c t j = 125c i d = 5.2a 25 50 75 100 125 150 starting t j , junction temperature (c) 0 50 100 150 200 250 300 350 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 0.91a 1.1a bottom 5.2a fig 14.

for hexfet power mosfets
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? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period

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6 www.irf.com fig 16a. switching time test circuit fig 16b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f fig 15b. unclamped inductive waveforms fig 15a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 17a. gate charge test circuit fig 17b gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 1k vcc dut 0 l s &' 1 (
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www.irf.com 7 data and specifications subject to change without notice. this product has been designed and qualified for the consumer market. qualification standards can be found on irs web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 10/2009 to-220 full-pak 5-pin part marking information
!"!# to-220 full-pak 5-pin package outline, lead-form option 117 (dimensions are shown in millimeters (inches))

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